1. Field of the Invention
The present invention relates to an interface circuit, an integrated circuit apparatus including the interface circuit, and an electronic apparatus including the interface circuit.
2. Description of the Related Art
In recent years, along with a reduction in size and thickness of an electronic apparatus, a circuit board to control the electronic apparatus has been miniaturized. A method for realizing miniaturization of such circuit board includes a system-on-chip technology to mount a number of functions on a single integrated circuit apparatus. In particular, the system-on-chip technology is frequently used in an application specific integrated circuit (ASIC). Functions incorporated into an integrated circuit by the system-on-chip technology include, for example, analog to digital conversion, specific logic operation, communication control, sequence control by a central processing unit (CPU) or the like. As a result of such increased integration of various functions, the size of the ASIC is also increasing. To address a problem, as ASIC is designed which enables using of a circuit having specific functions in the ASIC for a plurality of applications.
In particular, in a case where the ASIC is configured to communicate with a plurality of elements (for example, memory such as electrically erasable programmable read-only memory (EEPROM)), a method of communicating with a plurality of elements using one communication data generation circuit inside the ASIC has been conventionally considered.
For example, there is a method for disposing communication signal lines connecting a plurality of elements in parallel to each other on a circuit board so that a target element for communication can be selected by controlling a chip select signal. However, a problem arises when each of a plurality of elements receives electric power (supplied by different electric power system) having a different voltage for its operation.
The problem is that a communication signal to be input to an element which is supplied with electric power is input to an element which is not supplied with electric power. The input of this signal may result in a failure or a malfunction of the element receiving no electric power supply.
To address this problem, there is a conventional technology that connects a diode or the like to a communication signal line on a circuit board.
FIG. 5 is a circuit diagram discussed in Japanese Patent Application Laid-Open No. 2-242313. A main apparatus 11 is connected with peripheral apparatuses 21 and 22 arranged in parallel to each other. The peripheral apparatuses 21 and 22 are supplied with different voltages, that is, VCC1 and VCC2 respectively.
Each input terminal of the peripheral apparatuses 21 and 22 is pulled up by each voltage. The No. 2-242313 discusses that even if the voltages VCC1 and VCC2 are different, when a transistor 11a is turned off, the come-around of a voltage signal can be prevented by a diode 41 or 42.
FIG. 6 is a circuit diagram discussed in Japanese Patent Application Laid-Open No. 2002-132401. A microprocessor unit (MPU) 30 and a data processing random access memory (DPRAM) 40 are respectively run by different power source systems MVCC and SVCC. A diode D1 and a diode D2 are connected to one another with reverse polarity. For example, when the power source system SVCC is disconnected, signal lines S1, S2, and S3 are pulled up by the power source system MVCC. However, the come-around of a voltage signal to the power source system SVCC side can be prevented by addition of the diode D2.
However, in the conventional circuits discussed in Japanese Patent Application Laid-Open No. 2-242313 and Japanese Patent Application Laid-Open No. 2002-132401, it is required to mount an additional component (diode) on a circuit board. This results in the increase of component count and manufacturing cost. Further, the increase of component count restricts pattern design of circuit wiring and interferes with miniaturization of an electronic circuit board.
To avoid additional components, there is a method for supplying electric power to all elements connected in parallel when executing communication with an element. In this method, electric power is supplied to all elements including an element that does not obtain access.
For example, in an electronic apparatus, to reduce electric power consumption during standby, electric power is supplied only just before and after an access is obtained. However, in the above-described method for supplying electric power to all elements, electric power is supplied and terminated although an element is not accessed, thus the frequency of supply and suspension of electric power is increased. Such increased frequency can reduce the life of elements.
Further, in the method of supplying electric power to all elements, elements cannot be protected when a failure of an electric power supply system occurs.